Nxp-semiconductors PCA9665 Manual de usuario descargar pdf (Pagina 26)

Product data sheet Rev. 02 — 7 December 2006 26 of 91

NXP Semiconductors

PCA9665

Fm+ parallel bus to I

C-bus controller

(1) See Table 31.

(2) Deﬁned state when a single byte is received and an ACK is sent (AA = 1).

(3) Deﬁned state when a single byte is received and a NACK is sent (AA = 0).

Fig 9. Format and states in the Slave Receiver Byte mode (MODE = 0)

S SLA W A

DATA

A P or S

60h

80h A0h

68h

002aab026

reception of

own slave address

and one or more

data bytes;

all are Acknowledged.

last data byte received is

Not Acknowledged

arbitration lost as MST and

addressed as slave

DATA A

80h

P or S

F8h

88h

on STOP

P or S

F8h

on STOP

GENERAL

CALL = 00h

A A P or S

D0h

E0h A0h

D8h

DATA A

E0h

P or SA

E8h

reception of the

General Call address

and one or more

data bytes

last data byte received is

Not Acknowledged

arbitration lost as MST and

addressed as slave by

General Call

F8h

on STOP

(2) (2)

(3)

(2) (2)

(3)

P or S

F8h

on STOP

This number (contained in I2CSTA) corresponds

to a defined state of the I

C-bus.

(1)

any number of data bytes and

their associated Acknowledge bits

from master to slave

from slave to master

DATA

1 2 ... 21 22 23 24 25 26 27 28 29 30 31 ... 90 91

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